Kessel-lo, Belgium

Jinyoun Cho

This inventor holds 1 USPTO granted patent. Top assignees: Imec Vzw, Katholieke Universiteit Leuven. Active years: 2021.


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2021

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1 patent (USPTO):Explore Patents

Title: Jinyoun Cho: Innovator in Semiconductor Technology

Introduction

Jinyoun Cho is a notable inventor based in Kessel-lo, Belgium. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.

Latest Patents

Jinyoun Cho holds a patent titled "Method for forming a passivating electrical contact on a crystalline semiconductor substrate and device comprising such contact." This method involves depositing a first layer of amorphous silicon on a substrate's surface, followed by a second layer of metal. An annealing process is then performed at temperatures ranging from 70°C to 200°C, inducing a silicidation reaction that forms a third layer of metal silicide in electrical contact with the substrate. This innovative approach results in a remaining part of the first layer being positioned between the substrate and the third layer, enhancing the device's performance.

Career Highlights

Throughout his career, Jinyoun Cho has worked with esteemed organizations such as Imec Vzw and Katholieke Universiteit Leuven. His experience in these institutions has allowed him to develop and refine his expertise in semiconductor technologies.

Collaborations

Jinyoun has collaborated with notable colleagues, including Maarten Debucquoy and Jef Poortmans. These partnerships have contributed to his innovative work and advancements in the field.

Conclusion

Jinyoun Cho's contributions to semiconductor technology through his patent and collaborations highlight his role as an influential inventor. His work continues to impact the industry positively.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
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