This inventor holds 1 USPTO granted patent. Top assignee: Lucent Technologies Inc.. Active years: 1998.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1998
Title: The Innovations of Jing-Yang Jou
Introduction
Jing-Yang Jou is a notable inventor based in Edison, NJ (US). He has made significant contributions to the field of digital integrated circuits. His work focuses on enhancing the testability of these circuits while maintaining their performance characteristics.
Latest Patents
Jou holds a patent for a "Method and integrated circuit adapted for partial scan testability." This invention provides a method and apparatus that modify digital integrated circuits for partial scan testing. The approach minimizes the impact on the circuit's performance. The scan memory elements are selected based on their ability to eliminate feedback cycles and considerations of potential performance degradation.
Career Highlights
Jing-Yang Jou has had a successful career at Lucent Technologies Inc., where he has applied his expertise in integrated circuits. His innovative methods have contributed to advancements in the industry.
Collaborations
Jou has collaborated with Kwang-Ting Cheng, a talented woman in the field. Their partnership has likely fostered further innovations and improvements in their respective areas of expertise.
Conclusion
Jing-Yang Jou's contributions to integrated circuit technology demonstrate his commitment to innovation and excellence. His patent reflects a significant advancement in the field, showcasing his ability to enhance circuit performance while ensuring testability.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile