Taipei, Taiwan

Jing-Kae Liou

This inventor holds 1 USPTO granted patent. Top assignee: Nan Ya Technology Corporation. Active years: 2010.


% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2010

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Innovations of Jing-Kae Liou

Introduction

Jing-Kae Liou is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a patented method that enhances transistor structures.

Latest Patents

Jing-Kae Liou holds a patent for a "Method for forming bit-line contact plug and transistor structure." This method involves providing a substrate that includes a transistor with a gate structure and source/drain at both sides of the gate structure. The process includes forming a conductive layer, a bit-line contact material layer, and a hard mask layer. An etching process is performed using the conductive layer as an etching stop layer to etch the bit-line contact material layer and the hard mask layer, ultimately forming the bit-line contact plug on the source/drain.

Career Highlights

Liou is currently employed at Nan Ya Technology Corporation, where he continues to work on advancements in semiconductor technology. His expertise in this area has positioned him as a valuable asset to his company and the industry.

Collaborations

Some of his coworkers include Yu-Chung Fang and Hong-Wen Lee, who contribute to the innovative environment at Nan Ya Technology Corporation.

Conclusion

Jing-Kae Liou's contributions to semiconductor technology through his patent and work at Nan Ya Technology Corporation highlight his role as an influential inventor in the field. His innovative methods continue to shape the future of transistor structures.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
Loading…