Shenzhen, China

Jincheng Tan

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jincheng Tan. Retrieved from https://idiyas.com/inventor/jincheng-tan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jincheng Tan and Thin-Film Transistor Innovation.

Introduction

Jincheng Tan is an inventor based in Shenzhen, China. His patent work includes a thin-film transistor design and manufacturing method intended for use in display technology. He is associated with Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.

Latest Patents

Tan is named on 1 patent: “Thin Film Transistor, Method for Manufacturing the Same, and Array Substrate.” The patent describes a transistor with a gate insulating layer made up of at least three layers. The first and third layers are deposited at a low rate, while the second is deposited at a high rate. The first layer contacts the gate, and the third contacts the active layer. The patent specifies that the first and third layers have greater density than the second layer.

Career Highlights

Tan’s disclosed invention addresses the structure and manufacture of thin-film transistors, components used in display technologies. His work focuses on the layered gate insulator and its relationship to the transistor’s gate and active layer.

Collaborations

Tan’s patent is associated with Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., a company working in the display technology sector.

Conclusion

Jincheng Tan’s patent documents a layered gate-insulator approach for thin-film transistors, reflecting his contribution to display-related innovation in Shenzhen.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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