San Jose, CA, United States of America

Jin Wu


Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2022

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1 patent (USPTO):Explore Patents

Title: The Innovative Contributions of Jin Wu

Introduction

Jin Wu is a notable inventor based in San Jose, California. He has made significant contributions to the field of integrated circuit design. His work focuses on enhancing the efficiency and effectiveness of power management in electronic systems.

Latest Patents

Jin Wu holds a patent for a "Method to perform secondary-PG aware buffering in IC design flow." This innovative system is designed to generate a design of an integrated circuit. It includes a memory and a processor that defines a plurality of voltage area regions (VARs). These regions are based on the availability of primary and secondary power sources. The processor also constrains the placement and routing of elements in the integrated circuit design according to power requirements.

Career Highlights

Jin Wu is currently employed at Synopsys, Inc., a leading company in electronic design automation. His work at Synopsys has allowed him to apply his innovative ideas in practical applications. He has been instrumental in advancing the company's capabilities in integrated circuit design.

Collaborations

Jin collaborates with talented coworkers, including Renu Mehra and Sabyasachi Das. Their combined expertise contributes to the success of their projects and the advancement of technology in their field.

Conclusion

Jin Wu's contributions to integrated circuit design through his innovative patent demonstrate his commitment to advancing technology. His work at Synopsys, along with his collaborations, highlights the importance of teamwork in achieving groundbreaking innovations.

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