Company Filing History:
Years Active: 2009
Title: Jim Jyh-Herng Wang: Innovator in Analog IP Characterization
Introduction
Jim Jyh-Herng Wang is a notable inventor based in Hsinchu County, Taiwan. He has made significant contributions to the field of analog integrated circuits, particularly in the characterization of setup and hold times for analog intellectual properties (IPs). His innovative methodologies have streamlined processes in the industry.
Latest Patents
Jim Jyh-Herng Wang holds a patent titled "Methodology and system for setup/hold time characterization of analog IP." This patent presents a fast methodology and system to characterize setup and hold times for analog IPs. Instead of simulating entire IPs, the approach focuses on partial circuits of clock and data paths. This includes simulating the paths of clock pins and data input pins before reaching the first level D flip-flop (DFF). The methodology employs multi-path searching of hierarchical SPICE netlists to reduce circuit subsets and merge paths, ultimately characterizing the setup and hold times for the analog IP.
Career Highlights
Jim is currently employed at Faraday Technology Corporation, where he continues to advance his research and development efforts. His work has been instrumental in enhancing the efficiency of analog IP characterization, making significant impacts in the semiconductor industry.
Collaborations
Jim has collaborated with notable colleagues, including Hanping Chen and Chih-Yang Peng. Their teamwork has contributed to the successful development of innovative solutions in the field.
Conclusion
Jim Jyh-Herng Wang is a distinguished inventor whose work in analog IP characterization has paved the way for advancements in the semiconductor industry. His contributions continue to influence the field positively.