Suzhou, China

Jianxun Liu

This inventor holds 1 USPTO granted patent and 1 published patent application and 1 EPO patent. Top assignee: Chinese Academy of Sciences. Active years: 2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jianxun Liu. Retrieved from https://idiyas.com/inventor/jianxun-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0


Average Co-Inventor Count = 9.0

ph-index = 1


Company Filing History:


Years Active: 2024

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1 patent (USPTO):Explore Patents

Title: Innovations of Jianxun Liu in Semiconductor Technology

Introduction

Jianxun Liu is a prominent inventor based in Suzhou, China. He has made significant contributions to the field of semiconductor technology. His innovative work focuses on enhancing the manufacturing processes of semiconductor devices.

Latest Patents

Jianxun Liu holds a patent for a semiconductor device and its manufacturing method. The patent describes a method that involves creating a semiconductor material layer with two laminated semiconductor layers, separated by an etching transition layer. This method allows for precise control over the depth of the trench etched in the semiconductor material, thereby preventing surface damage and ensuring the electrical characteristics of the device remain stable.

Career Highlights

Liu is affiliated with the Chinese Academy of Sciences, where he conducts research and development in semiconductor technologies. His work has been instrumental in advancing the manufacturing techniques used in the semiconductor industry.

Collaborations

Jianxun Liu collaborates with notable colleagues, including Qian Sun and Shuai Su. Their combined expertise contributes to the innovative projects undertaken at the Chinese Academy of Sciences.

Conclusion

Jianxun Liu's contributions to semiconductor technology exemplify the importance of innovation in enhancing manufacturing processes. His patent reflects a commitment to precision and quality in semiconductor device production.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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