This inventor holds 1 USPTO granted patent. Top assignee: Agere Systems Inc.. Active years: 2007.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2007
Title: Innovations of Jia Jing Wang in Memory Systems
Introduction
Jia Jing Wang is an accomplished inventor based in Arlington, VA (US). He has made significant contributions to the field of memory systems, particularly in reducing read data strobe latency. His innovative work has led to the development of a patent that enhances the efficiency of random access memory arrays.
Latest Patents
Jia Jing Wang holds a patent titled "Reducing read data strobe latency in a memory system." This patent describes a read activity detector circuit designed for use in a random access memory array. The circuit includes multiple synchronizer circuits that receive reference clock signals with varying phases. These circuits generate output signals that align with the reference clock, allowing for improved data reading from the memory array.
Career Highlights
Wang is currently employed at Agere Systems Inc., where he continues to innovate in the field of memory technology. His work has been instrumental in advancing the capabilities of memory systems, making them more efficient and reliable.
Collaborations
Throughout his career, Jia Jing Wang has collaborated with notable colleagues, including Michael L Snodgrass and Jin Liu. These partnerships have fostered a creative environment that encourages the development of groundbreaking technologies.
Conclusion
Jia Jing Wang's contributions to memory systems through his patent and work at Agere Systems Inc. highlight his role as a key innovator in the field. His efforts continue to shape the future of memory technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
