Tainan, Taiwan

Jhuang-Wei Cyue

This inventor holds 1 USPTO granted patent. Top assignee: National Cheng-Kung University. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jhuang-Wei Cyue. Retrieved from https://idiyas.com/inventor/jhuang-wei-cyue

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jhuang-Wei Cyue: Inventor of Low-EMI Class-D Amplifier Technology

Introduction

Jhuang-Wei Cyue is an inventor based in Tainan, Taiwan. His work includes a patented Class-D amplifier design that combines capacitive coupling with voltage boosting. He is associated with National Cheng-Kung University.

Latest Patents

Cyue is credited with 1 patent: “Low-EMI Capacitively-Coupled Class-D Amplifiers with Voltage Boosting.” The invention describes a Class-D amplifier that receives input and feedback signals through a capacitively coupled amplifier, then processes the resulting error signal with a loop filter. A pulse-width modulation generator produces signals for a voltage-boosting power stage, which generates an output and feeds it back to the loop filter. The boosted output can reach a maximum voltage greater than the power supply voltage.

Career Highlights

Cyue’s patent reflects work on amplifier architecture, signal processing, and power-stage design. Its voltage-boosting approach is intended to support an output voltage above the supply voltage, while the capacitively coupled design addresses low electromagnetic interference.

Collaborations

Cyue’s listed coworker is Tai-Haur Kuo. His work is associated with National Cheng-Kung University.

Conclusion

Jhuang-Wei Cyue’s patented amplifier design brings together capacitive coupling, pulse-width modulation, and voltage boosting in a Class-D architecture.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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