Phoenix, AZ, United States of America

Jerry L Bledsoe

This inventor holds 1 USPTO granted patent. Top assignee: Motorola Corporation. Active years: 1977.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jerry L Bledsoe. Retrieved from https://idiyas.com/inventor/jerry-l-bledsoe-vfgn4hqm

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 19(Granted Patents)


Company Filing History:


Years Active: 1977

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Jerry L Bledsoe: Innovator in Semiconductor Technology

Introduction

Jerry L Bledsoe is a notable inventor based in Phoenix, Arizona. He has made significant contributions to the field of semiconductor technology. His innovative approach has led to the development of a unique method for manufacturing high-speed semiconductor devices.

Latest Patents

Bledsoe holds a patent for a "Method for manufacturing a high-speed semiconductor device." This patent describes a method that selectively reduces the minority carrier lifetime in regions susceptible to minority carrier charge storage. The selective reduction is achieved by implanting ions of low atomic weight into the surface of the semiconductor crystal, which locally reduces the sub-surface lifetime.

Career Highlights

Throughout his career, Jerry L Bledsoe has worked with Motorola Corporation, a leading company in the telecommunications and semiconductor industry. His work has been instrumental in advancing semiconductor manufacturing techniques.

Collaborations

Bledsoe has collaborated with Clarence A Lund, contributing to the development of innovative technologies in the semiconductor field.

Conclusion

Jerry L Bledsoe's contributions to semiconductor technology through his patented methods highlight his role as an influential inventor in the industry. His work continues to impact the development of high-speed semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…