Jeong-suk Yang

Title: Jeong-suk Yang and Semiconductor Memory Innovation.

Introduction

Jeong-suk Yang is an inventor associated with Suwon, South Korea, and Samsung Electronics Co., Ltd. Her patent work includes a circuit design intended to support reliable, high-speed semiconductor memory operation.

Latest Patents

Yang is credited with 1 patent: “CAS Latency Circuit and Semiconductor Memory Device Including the Same.” The invention describes a column address strobe (CAS) latency circuit designed to generate a stable latency signal in a high-speed semiconductor memory device. Its components include an internal read command signal generator and a latency clock generator coupled to a latency signal generator. The latency signal generator shifts an internal read signal according to latency control clocks, producing the stable latency signal.

Career Highlights

Yang’s listed patent is associated with Samsung Electronics Co., Ltd. It addresses timing control in semiconductor memory, where stable latency signaling can support dependable device operation at high speeds.

Collaborations

The patent lists Seung-Bum Ko and Byung-Hoon Jeong among Yang’s coworkers, reflecting a collaborative context for the invention.

Conclusion

Jeong-suk Yang’s patent focuses on stable CAS latency signaling for high-speed semiconductor memory, highlighting her contribution to memory-device innovation.