Jeong-Don Lim

This inventor holds 10 USPTO granted patents and 2 published patent applications. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2007-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeong-Don Lim. Retrieved from https://idiyas.com/inventor/jeong-don-lim

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 10 (Patent Applications = 2)

% Patents Active = 100.0

Average Co-Inventor Count = 3.2

ph-index = 5

Forward Citations = 117(Granted Patents)

Location History:

Gyeonggi-do, KR (2007 - 2010)
Seongnam-si, KR (2010 - 2012)

Company Filing History:

10 out of 138,671

Samsung Electronics Co., Ltd.

patents

Years Active: 2007-2012

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10 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8254184 - Semiconductor memory device having a latency controller (2012-08-28),

2. 8189403 - High speed linear differential amplifier (2012-05-29),

3. 8169268 - Oscillation circuit and semiconductor device having the same (2012-05-01),

4. 7853840 - Semiconductor memory device and methods thereof (2010-12-14),

5. 7688102 - Majority voter circuits and semiconductor devices including the same (2010-03-30),

6. 7656742 - Circuit and method for sampling valid command using extended valid address window in double pumped address scheme memory device (2010-02-02),

7. 7643355 - Semiconductor memory device and method of inputting/outputting data (2010-01-05),

8. 7400541 - Circuits and methods for data bus inversion in a semiconductor memory (2008-07-15),

9. 7394720 - Circuit and method for sampling valid command using extended valid address window in double pumped address scheme memory device (2008-07-01),

10. 7280412 - Circuits and methods for data bus inversion in a semiconductor memory (2007-10-09),

Title: The Innovations of Jeong-Don Lim

Introduction

Jeong-Don Lim is a prominent inventor based in Seongnam-si, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 10 patents. His work focuses on enhancing the performance and efficiency of semiconductor devices, which are crucial in modern electronics.

Latest Patents

Among his latest patents is a semiconductor memory device featuring a latency controller. This innovative device includes a first-in first-out (FIFO) register and provides a power-saving effect. The latency controller outputs a latency signal corresponding to the applied read command, effectively managing power consumption during operation. Another notable patent is for a high-speed linear differential amplifier (HSLDA) that incorporates automatic gain adjustment. This amplifier maximizes linearity regardless of manufacturing variations, temperature changes, or input signal swing width. It consists of a differential amplifier and a control signal generator, which includes a replica differential amplifier, a reference voltage generator, and a comparator. The comparator outputs a control signal that adjusts the gain of the amplifier, ensuring optimal performance.

Career Highlights

Jeong-Don Lim is currently employed at Samsung Electronics Co., Ltd., a leading global technology company. His role involves developing advanced semiconductor technologies that push the boundaries of electronic performance. His expertise and innovative mindset have made him a valuable asset to the company.

Collaborations

Throughout his career, Jeong-Don Lim has collaborated with talented individuals such as Kwang-il Park and Seong-Jin Jang. These collaborations have fostered a creative environment that encourages the development of groundbreaking technologies.

Conclusion

Jeong-Don Lim's contributions to semiconductor technology exemplify the spirit of innovation. His patents reflect a commitment to enhancing electronic devices, making a lasting impact on the industry. His work continues to inspire future advancements in technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: