San Diego, CA, United States of America

Jennifer Hagstrom

This inventor holds 1 USPTO granted patent. Top assignee: Qualcomm Incorporated. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jennifer Hagstrom. Retrieved from https://idiyas.com/inventor/jennifer-hagstrom

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jennifer Hagstrom and Low-Latency SoC Power Management

Introduction

Jennifer Hagstrom is an inventor associated with Qualcomm Incorporated in San Diego, California. Her patent work concerns system-on-chip (SoC) power management and performance optimization.

Latest Patents

Hagstrom is named on 1 patent: “Low-latency control interface and protocol.” The invention describes a flexible, low-latency bus protocol for coordinating power limits and carrying high-priority messages. It supports shallow power-mitigation techniques, which can reduce the need for more extensive mitigation of a device.

Career Highlights

Hagstrom’s listed patent reflects work on coordinating power management and system performance through a responsive control interface. The available information identifies Qualcomm Incorporated as her company.

Collaborations

Her listed coworkers include Gordon Lee and Vijayakumar Ashok Dibbad.

Conclusion

Jennifer Hagstrom’s patent focuses on a low-latency protocol that helps coordinate SoC power limits while supporting efficient system performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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