Jeffrey Daudel

Title: The Innovative Contributions of Jeffrey Daudel

Introduction

Jeffrey Daudel is a notable inventor based in Santa Clara, CA. He has made significant contributions to the field of hardware simulation and processing methods. With a total of 2 patents, his work showcases a blend of creativity and technical expertise.

Latest Patents

One of Daudel's latest patents is focused on the synchronization of hardware simulation processes. This invention presents a system, method, and computer program product for simulating a system of hardware components. Each component is simulated in a hardware definition language such as VERILOG. The invention synchronizes simulation modules by issuing clock credit to each module, allowing for efficient operation and checkpointing of the devices under test (DUT).

Another significant patent is the multithreaded layered-code processor. This method involves passing through layered code to discover each layer, acquiring a lock when a layer is found, and determining whether to spawn a thread for processing. This innovative approach enhances the efficiency of processing layered code by allowing concurrent execution of threads.

Career Highlights

Jeffrey Daudel is currently employed at Silicon Graphics, Incorporated, where he continues to push the boundaries of technology. His work has been instrumental in advancing hardware simulation and processing techniques.

Collaborations

Throughout his career, Daudel has collaborated with talented individuals such as Alex Chalfin and Shrijeet Mukherjee. These collaborations have contributed to the development of innovative solutions in the field.

Conclusion

Jeffrey Daudel's contributions to hardware simulation and processing methods highlight his role as a leading inventor in the technology sector. His patents reflect a commitment to innovation and excellence in engineering.