Jchung-Chang Chen

Title: Jchung-Chang Chen: Innovator in Semiconductor Technology

Introduction

Jchung-Chang Chen is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the area of copper damascene processes. His innovative methods have improved the reliability and efficiency of semiconductor manufacturing.

Latest Patents

Jchung-Chang Chen holds a patent titled "Method of forming barrier layer with reduced resistivity and improved reliability in copper damascene process." This patent describes a method for forming a copper dual damascene that enhances copper migration resistance and electrical resistivity. The process involves providing a semiconductor wafer with upper and lower dielectric insulating layers, forming a dual damascene opening, and depositing a barrier layer to line the opening. The method concludes with filling the opening with copper to achieve a substantially planar surface.

Career Highlights

Throughout his career, Jchung-Chang Chen has focused on advancing semiconductor technologies. His work has been instrumental in developing methods that enhance the performance and reliability of electronic devices. His innovative approaches have garnered attention in the industry and contributed to the evolution of semiconductor manufacturing processes.

Collaborations

Jchung-Chang Chen has collaborated with notable colleagues, including Ying-Lang Wang and Kei-Wei Chen. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas in the semiconductor field.

Conclusion

Jchung-Chang Chen's contributions to semiconductor technology exemplify the impact of innovation in the industry. His patented methods continue to influence the development of more efficient and reliable electronic devices.