San Jose, CA, United States of America

Jaujiun Chen


Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 2018-2019

where 'Filed Patents' based on already Granted Patents

2 patents (USPTO):

Title: Innovations by Jaujiun Chen

Introduction

Jaujiun Chen is a notable inventor based in San Jose, CA (US). He has made significant contributions to the field of technology, particularly in the area of wafer calibration and overlay error correction. With a total of 2 patents, his work has had a considerable impact on the industry.

Latest Patents

Jaujiun Chen's latest patents focus on overlay error correction. The first patent describes a calibration curve for a wafer comprising a layer on a substrate. This calibration curve represents a local parameter change as a function of a treatment parameter associated with a wafer's exposure to light. The local parameter of the wafer is measured, and an overlay error is determined based on this measurement. A treatment map is then computed based on the calibration curve to correct the overlay error for the wafer. This treatment map represents the treatment parameter as a function of a location on the wafer.

Career Highlights

Jaujiun Chen is currently employed at Applied Materials, Inc., where he continues to innovate and develop new technologies. His expertise in wafer calibration has positioned him as a key player in the field.

Collaborations

Some of his notable coworkers include Mangesh Bangar and Bruce E Adams. Their collaboration has contributed to the advancement of technologies in their respective areas.

Conclusion

Jaujiun Chen's work in overlay error correction and wafer calibration showcases his innovative spirit and dedication to advancing technology. His contributions are valuable to the industry and highlight the importance of continuous innovation.

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