Janet M DeBlasi

Title: Janet M DeBlasi: Innovator in Semiconductor Technology

Introduction

Janet M DeBlasi is a prominent inventor based in Union City, CA (US). She has made significant contributions to the field of semiconductor technology, particularly in the area of metallization processes for MOS devices. Her innovative work has led to advancements that are crucial for the development of very-large-scale integration (VLSI) circuits.

Latest Patents

Janet M DeBlasi holds 1 patent for her invention titled "Self-aligned metallization for semiconductor device and process using." This patent describes a self-aligned metallization technique for MOS devices, where a first layer of tungsten is selectively deposited on the exposed silicon surfaces, including the source, drain, and gate regions. A layer providing nucleation sites for tungsten is formed across insulating oxide regions, followed by a second tungsten layer that enhances interconnection across these regions. This method not only reduces electrical resistivity but also allows for relaxed mask alignment and etching tolerance requirements, making it particularly useful in VLSI circuits.

Career Highlights

Throughout her career, Janet has worked with Signetics, a company known for its innovations in semiconductor technology. Her expertise in the field has positioned her as a key player in the development of advanced semiconductor devices.

Collaborations

Janet has collaborated with Paulus Z Van Der Putte, contributing to the advancement of semiconductor technologies through their combined expertise.

Conclusion

Janet M DeBlasi's contributions to semiconductor technology through her innovative patent demonstrate her significant role in the industry. Her work continues to influence the development of efficient and advanced electronic devices.