Oppenweiler, Germany

Jan Maier

This inventor holds 2 USPTO granted patents. Top assignee: Murrelektronik Gmbh. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jan Maier. Retrieved from https://idiyas.com/inventor/jan-maier-88irv4jf

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.0


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Jan Maier: Inventor of Electronic Device Housing and Circuit Board Innovations.

Introduction

Jan Maier is an inventor based in Oppenweiler, Germany. His patent work includes designs for electronic device housings and printed circuit board assemblies. He is associated with Murrelektronik GmbH and holds 2 patents.

Latest Patents

Maier’s listed patents address practical design considerations for electronic equipment.

“Printed circuit board assembly” describes a fieldbus device with a printed circuit board and electronic components arranged inside a housing. A gap filler rests between a housing bearing surface and an electronic component, supporting the board through the component and filler. Potting compound covers the board and contacts the gap filler.

“Housing assembly with all-round visible luminous areas” describes an electronic device housing with connection, longitudinal, and front sides. Its indicator lights are distributed around the housing so that, when activated, their luminous areas emit signals into at least a hemispherical region around the assembly.

Career Highlights

Maier’s patents focus on integrating circuit boards, components, housing structures, and visual indicators in electronic devices. The inventions describe approaches to supporting and protecting circuit boards and making indicator signals visible from multiple directions.

Collaborations

Maier is associated with Murrelektronik GmbH. His listed coworkers include Tim Roolf and Heiko Feisst.

Conclusion

Jan Maier’s patent portfolio reflects work on electronic device assemblies, combining circuit board support and protection with housing designs that improve the visibility of indicator signals.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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