Cromwell, CT, United States of America

James R Grace

This inventor holds 1 USPTO granted patent. Top assignee: Probot, Inc.. Active years: 1994.

IDiyas Innovation Intelligence. (2026). Inventor Profile: James R Grace. Retrieved from https://idiyas.com/inventor/james-r-grace-9yyj0w35

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.0

ph-index = 1

Forward Citations = 10(Granted Patents)


Company Filing History:


Years Active: 1994

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1 patent (USPTO):Explore Patents

Title: Innovations by James R. Grace

Introduction

James R. Grace is an accomplished inventor based in Cromwell, CT (US). He has made significant contributions to the field of circuit board testing through his innovative patent. His work focuses on enhancing the efficiency and accuracy of testing methods for electronic components.

Latest Patents

James R. Grace holds a patent for a "Method and apparatus for testing circuit boards." This invention utilizes a plurality of individually moveable probes in an X-Y plane, which can contact points of networks on either side of a circuit board. The patent describes a system that measures the discharge time of a charged network, providing critical insights into the functionality of circuit boards. The probes can also be used to measure resistance, allowing for comprehensive testing of networks to identify potential faults.

Career Highlights

James R. Grace is associated with Probot, Inc., where he applies his expertise in circuit board testing. His innovative approach has contributed to advancements in the reliability of electronic devices. His patent reflects a deep understanding of electrical engineering and a commitment to improving testing methodologies.

Conclusion

James R. Grace's contributions to circuit board testing through his innovative patent demonstrate his significant impact on the field of electronics. His work continues to influence the industry, ensuring that electronic components are tested with precision and reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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