Cupertino, CA, United States of America

Jagdish Belane

This inventor holds 1 USPTO granted patent. Top assignee: National Semiconductor Corporation. Active years: 1986.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jagdish Belane. Retrieved from https://idiyas.com/inventor/jagdish-belane

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 1986

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1 patent (USPTO):Explore Patents

Title: Jagdish Belane: Innovator in Semiconductor Technology

Introduction

Jagdish Belane is a notable inventor based in Cupertino, CA (US). He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent related to solder plating processes.

Latest Patents

Belane holds a patent for a "Solder plating process and semiconductor product." This method involves solder plating metal leads in plastic semiconductor packages. The process begins with cleaning the leads using a non-corrosive solution, which can be a carboxylic acid, a hydroxycarboxylic acid, or a combination of both. Following the cleaning, electroplating of tin or a tin/lead alloy onto the leads is performed. The electroplating solution is based on sulfonic acid or citric acid, incorporating suitable tin salts and/or lead salts. Additionally, a sequestering agent may be utilized to mitigate the corrosive effects of the electroplating bath.

Career Highlights

Jagdish Belane is associated with National Semiconductor Corporation, where he has applied his expertise in semiconductor technology. His work has contributed to advancements in the manufacturing processes of semiconductor products.

Collaborations

Belane has collaborated with notable coworkers, including Vijay M Sajja and Ranjan J Mathew. Their collective efforts have furthered the development of innovative solutions in the semiconductor industry.

Conclusion

Jagdish Belane's contributions to semiconductor technology through his patented solder plating process exemplify his innovative spirit and dedication to advancing the field. His work continues to influence the industry and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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