Santa Clara, CA, United States of America

Jagannathan Vasudevan


Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 36(Granted Patents)


Company Filing History:


Years Active: 2017

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1 patent (USPTO):

Title: Jagannathan Vasudevan: Innovator in Semiconductor Technology

Introduction

Jagannathan Vasudevan is a prominent inventor based in Santa Clara, CA (US). He has made significant contributions to the field of semiconductor technology, particularly in the development of methods that enhance device performance.

Latest Patents

Vasudevan holds a patent titled "Methods of forming a high-k contact liner to improve effective via separation distance and the resulting devices." This innovative method involves forming first and second contact openings in a dielectric layer, with a focus on improving the effective separation distance between conductive features. The process includes the formation of a liner layer, a barrier layer with varying dielectric constants, and the embedding of conductive features, all aimed at enhancing device efficiency.

Career Highlights

Vasudevan's career is marked by his work at Globalfoundries Inc., where he has been instrumental in advancing semiconductor manufacturing techniques. His expertise in the field has led to the development of cutting-edge technologies that are crucial for modern electronic devices.

Collaborations

Throughout his career, Vasudevan has collaborated with notable colleagues, including Guillaume Bouche and Andy C Wei. These partnerships have fostered innovation and contributed to the success of various projects within the semiconductor industry.

Conclusion

Jagannathan Vasudevan's contributions to semiconductor technology through his innovative patents and collaborations highlight his role as a key figure in the industry. His work continues to influence the development of advanced electronic devices.

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