This inventor holds 2 USPTO granted patents and 3 published patent applications and 1 EPO patent. Top assignee: Samsung Electronics Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Jaewon Na - Innovator in Semiconductor Technology
Introduction: Jaewon Na is an accomplished inventor based in Suwon-si, South Korea. He is currently employed at Samsung Electronics Co., Ltd., where he focuses on developing advanced semiconductor technologies. Although he has not yet been granted any patents, his work is significant in the field of electronics.
Latest Patent Applications: Jaewon Na has submitted several notable patent applications, including:
1. **Semiconductor Devices Having Mold Structure** - This application describes a semiconductor device that includes a bit line and a molded structure on the bit line. The molded structure features a metal-containing layer and a channel structure that extends upwardly. The design aims to enhance the performance and efficiency of semiconductor devices.
2. **Semiconductor Devices Having Insulating Structures** - This application outlines a semiconductor device comprising a bit line structure and back gate structures. It includes multiple channel layers and word lines, with an insulating structure designed to improve the device's functionality and reliability.
Conclusion: Jaewon Na is a promising inventor whose contributions to semiconductor technology are noteworthy. His innovative patent applications reflect his commitment to advancing the field, and his work at Samsung Electronics Co., Ltd. positions him as a key player in the industry.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile