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For the Inventor, By the Inventor

Seoul, South Korea

Jaegab Lee

This inventor holds 4 USPTO granted patents and 1 published patent application. Top assignee: Kookmin University. Active years: 2010-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jaegab Lee. Retrieved from https://idiyas.com/inventor/jaegab-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 4 

% Patents Active = 75.0

Average Co-Inventor Count = 2.8

ph-index = 2

Forward Citations = 9(Granted Patents)


Company Filing History:

goldMedal4 out of 170 
 
Kookmin University
 patents

Years Active: 2010-2017

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4 patents (USPTO):Explore Patents
1. 9633930 - Method of forming through-hole in silicon substrate, method of forming electrical connection element penetrating silicon substrate and semiconductor device manufactured thereby (2017-04-25),
2. 8268711 - Floating gate having multiple charge storing layers, method of fabricating the floating gate, non-volatile memory device using the same, and fabricating method thereof (2012-09-18),
3. 7897458 - Method of forming floating gate, non-volatile memory device using the same, and fabricating method thereof (2011-03-01),
4. 7745874 - Floating gate having multiple charge storing layers, method of fabricating the floating gate, non-volatile memory device using the same, and fabricating method thereof (2010-06-29),

Title: Innovations of Jaegab Lee in Semiconductor Technology

Introduction

Jaegab Lee is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. His work focuses on methods that enhance the performance and efficiency of semiconductor devices.

Latest Patents

Jaegab Lee's latest patents include innovative methods for forming through-holes in silicon substrates and electrical connection elements that penetrate these substrates. One of his notable inventions relates to a method of forming a through-hole capable of reducing roughness in the side wall while exhibiting low permittivity. This is achieved by alternatingly laminating cationic and anionic polymers on the through-hole, which helps in forming a porous elastic layer. Another significant patent involves a floating gate with multiple charge storage layers, which enhances the charge storage capacity of non-volatile memory devices. This floating gate is fabricated without high-temperature heat treatment, utilizing self-assembled metallic and semiconducting nano-particles.

Career Highlights

Jaegab Lee is affiliated with Kookmin University, where he continues to advance research in semiconductor technologies. His academic background and innovative mindset have positioned him as a key figure in his field.

Collaborations

He has collaborated with notable colleagues, including Jang-Sik Lee and Jinhan Cho, contributing to various research projects and patent developments.

Conclusion

Jaegab Lee's contributions to semiconductor technology through his innovative patents demonstrate his expertise and commitment to advancing the field. His work not only enhances the performance of semiconductor devices but also paves the way for future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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