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Seoul, South Korea

Jae-wook Kim

This inventor holds 9 USPTO granted patents and 2 published patent applications. Top assignees: Samsung Electronics Co., Ltd., Pantech & Curitel Communications, Inc., Pantech Co., Ltd.. Active years: 1998-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae-wook Kim. Retrieved from https://idiyas.com/inventor/jae-wook-kim-mtoyxke3

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 9 

% Patents Active = 66.7

Average Co-Inventor Count = 2.0

ph-index = 6

Forward Citations = 120(Granted Patents)


Location History:

  • Suwon, KR (2001)
  • Seoul, KR (1998 - 2011)

Company Filing History:

goldMedal6 out of 132,108 
 
Samsung Electronics Co., Ltd.
 patents
silverMedal1 out of 76 
 
Pantech & Curitel Communications, Inc.
 patents
bronzeMedal1 out of 317 
 
Pantech Co., Ltd.
 patents
4. 1 out of 834,601 
Other
 patents

Years Active: 1998-2011

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9 patents (USPTO):Explore Patents
1. 7873956 - Communication terminal and communication network for partially updating software, software update method, and software creation device and method therefor (2011-01-18),
2. 7817751 - Digital multimedia broadcasting receiver having improved reception capability and channel estimation method of the same (2010-10-19),
3. 6953739 - Method for manufacturing a semiconductor device having hemispherical grains at very low atmospheric pressure using first, second, and third vacuum pumps (2005-10-11),
4. 6845520 - Cap (2005-01-25),
5. 6673673 - Method for manufacturing a semiconductor device having hemispherical grains (2004-01-06),
6. 6301622 - Computer system having identification data and method for transferring identification data to computer (2001-10-09),
7. 6256129 - Portable computer and method of automatically controlling direction of infrared signal transmission and reception (2001-07-03),
8. 6074486 - Apparatus and method for manufacturing a semiconductor device having (2000-06-13),
9. 5821152 - Methods of forming hemispherical grained silicon electrodes including (1998-10-13),
Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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