Yuseong, South Korea

Jae-Sup Han

This inventor holds 2 USPTO granted patents. Top assignees: Electronics and Telecommunications Research Institute, Korea Telecommunication Authority. Active years: 1998-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae-Sup Han. Retrieved from https://idiyas.com/inventor/jae-sup-han-hjus3wpx

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 47(Granted Patents)


Location History:

  • Yusong-ku, KR (1998)
  • Daejon, KR (1999)

Company Filing History:


Years Active: 1998-1999

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2 patents (USPTO):Explore Patents

Title: Jae-Sup Han: Innovator in Power Mechanisms and ESD Protection

Introduction

Jae-Sup Han is a notable inventor based in Yuseong, South Korea. He has made significant contributions to the field of electronics, particularly in the development of power switch mechanisms and electrostatic discharge (ESD) protection systems. With a total of 2 patents, his work reflects a commitment to enhancing the functionality and safety of electronic devices.

Latest Patents

One of Jae-Sup Han's latest patents is a power switch on/off mechanism for a plug-in unit driven by an insertion/ejection device in a printed circuit board (PCB). This innovative mechanism is designed to adapt to various power switch configurations, thereby reducing manufacturing costs and simplifying maintenance. The mechanism features a power switch on/off lever with a protrusion that engages with a guide groove during the insertion and ejection of the plug-in unit. This design ensures that the power switch lever transitions smoothly between on and off states.

Another significant patent is an improved electrostatic discharge protection guide rail system for PCBs. This system provides essential protection against ESD, safeguarding the PCB of a plug-in unit housed within an electronic instrument. The design includes an ESD ground surface, an engaging jaw portion with a groove, and an insertion groove for an ESD strip. This innovative approach ensures that the PCB is protected from potential damage due to electrostatic discharge.

Career Highlights

Throughout his career, Jae-Sup Han has worked with prominent organizations such as the Electronics and Telecommunications Research Institute and the Korea Telecommunication Authority. His experience in these institutions has allowed him to develop and refine his innovative ideas, contributing to advancements in electronic technology.

Collaborations

Jae-Sup Han has collaborated with notable colleagues, including Nam-Il Her and Kwang-Soo Kim. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and expertise in the field of electronics.

Conclusion

Jae-Sup Han's contributions to the field of electronics through his innovative patents demonstrate his expertise and commitment to improving electronic device functionality and safety. His work continues to influence the industry, paving the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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