Seoul, South Korea

Jae Seol Cho

This inventor holds 1 USPTO granted patent. Top assignee: Samsung Display Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae Seol Cho. Retrieved from https://idiyas.com/inventor/jae-seol-cho-2hy6tc5d

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jae Seol Cho and Display Technology

Introduction

Jae Seol Cho is an inventor based in Seoul, South Korea, associated with Samsung Display Co., Ltd. His patent work concerns display-device structure and the arrangement of layers and signal wiring.

Latest Patents

The provided information lists one patent for Cho: “Display device having a first layer and a signal wire having different thicknesses.” The invention describes a substrate with separate signal-wire and transistor areas. A first layer and a signal wire are formed on the same layer of the substrate but have different thicknesses. A transistor is positioned on the first layer and electrically connected to a first electrode, with an emission layer and a second electrode arranged above it. The patent describes a structural approach to integrating transistor and signal-wire features in a display device.

Career Highlights

Cho is associated with Samsung Display Co., Ltd., a company focused on display technologies. The supplied record credits him with 1 patent.

Collaborations

The information provided identifies Kyung Hoon Park and Seungjoo Choi as Cho’s coworkers. Their names are included here as professional associations; no specific joint patent contribution was provided.

Conclusion

Jae Seol Cho’s listed patent reflects work on display-device architecture, particularly the use of layers with different thicknesses for transistor and signal-wire areas.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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