Seoul, South Korea

Jae Jong Han

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2016-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae Jong Han. Retrieved from https://idiyas.com/inventor/jae-jong-han-fxj3cq60

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2016-2021

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3 patents (USPTO):Explore Patents

Title: Jae Jong Han: Innovator in Semiconductor Technology

Introduction

Jae Jong Han is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of semiconductor technology, particularly in the development of FinFET devices. With a total of 3 patents to his name, Han continues to push the boundaries of innovation in this critical area of electronics.

Latest Patents

Han's latest patents focus on advanced methods for fabricating semiconductor devices. One of his notable inventions is a method for creating FinFET devices that feature active patterns and gate spacers on field insulating layers. This method involves forming a fin type pattern that protrudes from a substrate, along with a field insulating layer that covers a limited portion of the fin type pattern. The gate structure is then formed on both the field insulating layer and the fin type pattern, extending in a different direction. Additionally, a first barrier layer containing a nitrogen element is created in a specific region of the field insulating layer, which is exposed by the gate structure. This innovative approach enhances the performance and efficiency of semiconductor devices.

Another significant patent by Han outlines methods for fabricating FinFET devices that incorporate gate spacers on field insulating layers. Similar to his previous patent, this method also involves the formation of a fin type pattern and a field insulating layer, followed by the creation of a gate structure. The inclusion of a gate spacer on the first barrier layer and the side wall of the gate structure further optimizes the device's functionality.

Career Highlights

Jae Jong Han is currently employed at Samsung Electronics Co., Ltd., a leading company in the technology sector. His work at Samsung has allowed him to collaborate with some of the brightest minds in the industry, contributing to groundbreaking advancements in semiconductor technology.

Collaborations

Throughout his career, Han has worked alongside talented colleagues such as Gun Ho Jo and Dae Joung Kim. These collaborations have fostered an environment of innovation and creativity, leading to the development of cutting-edge technologies.

Conclusion

Jae Jong Han is a key figure in the semiconductor industry, with a focus on FinFET technology. His innovative patents and collaborations at Samsung Electronics Co., Ltd. highlight his commitment to advancing the field. Han's contributions are paving the way for future developments in semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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