Company Filing History:
Years Active: 1990-1994
Title: Jack D. Parrish: Innovator in High Voltage CMOS Technology
Introduction
Jack D. Parrish is a notable inventor based in Kokomo, IN (US), recognized for his contributions to the field of high voltage CMOS technology. With a total of 3 patents to his name, Parrish has made significant advancements that enhance the performance and efficiency of integrated circuits.
Latest Patents
Among his latest patents, Parrish developed a method for making a high voltage implanted channel device for VLSI. This innovative process fabricates a high voltage CMOS transistor featuring a non-self aligned implanted channel. This design allows the device to operate at high voltages without the need for alignment with the gate electrode, utilizing direct wafer stepper technology for accurate implantation. The result is a transistor that is compatible with VLSI and ULSI processes, characterized by a shorter channel length that increases area efficiency and current capability. Additionally, his patent includes a process for forming both high and low voltage CMOS transistors on a single integrated circuit chip, streamlining the manufacturing process.
Career Highlights
Jack D. Parrish has made significant strides in his career while working at Delco Electronics Corporation. His work has focused on enhancing the capabilities of CMOS technology, making it more efficient and effective for various applications.
Collaborations
Throughout his career, Parrish has collaborated with notable colleagues, including Douglas R. Schnabel and Walter Kirk Kosiak. These partnerships have contributed to the innovative advancements in the field of semiconductor technology.
Conclusion
Jack D. Parrish's contributions to high voltage CMOS technology have established him as a key figure in the field. His innovative patents and collaborative efforts continue to influence the development of efficient integrated circuits.