Oulu, Finland

Jaakko Haapalahti

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Nordic Semiconductor Asa. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jaakko Haapalahti. Retrieved from https://idiyas.com/inventor/jaakko-haapalahti

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jaakko Haapalahti: Inventor in Node Voltage Control

Introduction

Jaakko Haapalahti is an inventor based in Oulu, Finland. His listed patent concerns a circuit technique for controlling and maintaining voltage at a node. He is associated with Nordic Semiconductor ASA.

Latest Patents

Haapalahti’s listed invention, “Node voltage control,” describes a circuit with an analog voltage supply module, a clock, and a clocked digital control module. The circuit applies a bias voltage to supply a node, samples the node’s voltage at a clock edge, and stores the sampled value. It then disables the bias voltage and supplies the stored voltage to the node. When a refresh criterion is met, the digital control module initiates a refresh sequence that reapplies the bias voltage, samples the node again at a clock edge, and stores the refreshed value. Haapalahti is credited with 1 patent.

Career Highlights

Haapalahti’s patent work addresses voltage control in electronic circuitry, including a method for refreshing a stored node voltage. His professional association with Nordic Semiconductor ASA connects his work to a company focused on semiconductor technology.

Collaborations

Jarmo Väänänen and Lauri Linnansaari are identified as Haapalahti’s coworkers. The available information does not specify their roles in the patent or whether they collaborated directly on the invention.

Conclusion

Jaakko Haapalahti’s listed patent presents a clock-controlled approach to sampling, storing, and refreshing node voltage, highlighting his contribution to electronic circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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