Irene Johansen

Title: Innovations by Irene Johansen

Introduction

Irene Johansen is a notable inventor based in Portland, OR (US). She has made significant contributions to the field of technology, particularly in the design of System-on-Chips (SoCs). Her innovative work focuses on improving the efficiency of register access in complex chip designs.

Latest Patents

Irene holds a patent for a method to reduce register access latency in split-die SoC designs. This patent outlines methods and apparatuses that enhance the performance of SoCs by minimizing latency issues. The method is implemented on a platform that includes a legacy socket and one or more non-legacy sockets, which comprise split-die SoCs with multiple dielets interconnected by Embedded Multi-Die Interconnect Bridges (EMIBs). The core dielets contain essential components such as cores, cache controllers, and memory controllers. Her method establishes an affinity between control and status registers (CSRs) memory range for the non-legacy sockets, allowing for efficient programming of CSRs in memory controllers through optimized transactions.

Career Highlights

Irene Johansen is currently employed at Intel Corporation, where she continues to push the boundaries of technology through her innovative work. Her contributions have been instrumental in advancing the capabilities of modern computing systems.

Collaborations

Irene has collaborated with esteemed colleagues such as Anand K Enamandram and Eswaramoorthi Nallusamy. These collaborations have further enriched her work and contributed to the success of her projects.

Conclusion

Irene Johansen is a pioneering inventor whose work in reducing register access latency in SoC designs has made a significant impact in the technology sector. Her innovative methods and dedication to her field continue to inspire advancements in chip design and efficiency.