Hyoun S Choe

Title: Hyoun S Choe: Innovator in Integrated Circuit Technology

Introduction

Hyoun S Choe is a notable inventor based in La Palma, California. He has made significant contributions to the field of integrated circuits, particularly in the area of diffusion barriers for copper interconnects. His innovative approach has implications for enhancing the performance and reliability of semiconductor devices.

Latest Patents

Hyoun S Choe holds a patent for a method of depositing diffusion barriers for copper interconnects in integrated circuits. This method addresses the challenges associated with high resistivity phases that can occur during the manufacturing process. By eliminating these phases, his technique ensures high electrical conductivity and effective diffusion suppression between interconnect conductors, such as copper, and the semiconductor device. The preferred embodiment of his invention involves depositing a film of binary transition metal nitride and subsequently treating it with a silicon-containing gas to create a silicon-rich layer on the surface.

Career Highlights

Choe is associated with Novellus Systems Incorporated, a company known for its advanced semiconductor manufacturing technologies. His work at Novellus has positioned him as a key player in the development of innovative solutions for the semiconductor industry.

Collaborations

Hyoun S Choe has collaborated with notable colleagues, including Michal Danek and Karl B Levy. These partnerships have contributed to the advancement of technologies in the field of integrated circuits.

Conclusion

Hyoun S Choe's contributions to the field of integrated circuits through his innovative patent demonstrate his commitment to enhancing semiconductor technology. His work continues to influence the industry and pave the way for future advancements.