Hui Ye

Title: Innovations by Inventor Hui Ye

Introduction

Hui Ye is an accomplished inventor based in San Jose, California. He has made significant contributions to the field of semiconductor technology. His innovative work has led to the development of a patent that addresses critical challenges in semiconductor packaging.

Latest Patents

Hui Ye holds a patent for a "Semiconductor package having reduced parasitic inductance." This semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, and a molding encapsulation. The design features a flipped low side FET attached to a first die paddle of the lead frame. The lead frame comprises one or more voltage input (Vin) leads, a gate lead, one or more switching node (Lx) leads, a first die paddle, a second die paddle, and an end paddle. Each exposed bottom surface of the Lx leads is directly connected to the exposed bottom surface of the end paddle. The longitudinal direction of the exposed bottom surface of the gate lead is perpendicular to the longitudinal direction of each of the exposed bottom surfaces of the Lx leads. Notably, each of the Vin leads is of full thickness.

Career Highlights

Hui Ye is currently employed at Alpha and Omega Semiconductor International LP, where he continues to innovate in semiconductor technology. His work has been instrumental in advancing the efficiency and performance of semiconductor packages.

Collaborations

Hui collaborates with talented colleagues, including Yan Xun Xue and Lin Chen, who contribute to the innovative environment at Alpha and Omega Semiconductor International LP.

Conclusion

Hui Ye's contributions to semiconductor technology through his patent demonstrate his expertise and commitment to innovation. His work continues to influence the industry positively.