San Jose, CA, United States of America

Hui Su

This inventor holds 1 USPTO granted patent. Top assignee: Integrated Device Technology, Inc.. Active years: 2010.


Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Innovations of Hui Su in Memory Systems

Introduction

Hui Su is an accomplished inventor based in San Jose, California. She has made significant contributions to the field of memory systems, particularly through her innovative patent. Her work focuses on enhancing the efficiency and functionality of multi-queue memory systems.

Latest Patents

Hui Su holds a patent titled "Partial packet write and write data filtering in a multi-queue first-in first-out memory system." This invention introduces a multi-queue memory system that operates in a packet mode. Each packet is defined by a start of packet (SOP) marker and an end of packet (EOP) marker. The invention utilizes a packet status bit (PSB) to facilitate partial packet write and read operations. This allows for queue switching during ongoing packet operations, enhancing the system's flexibility. Additionally, the PSB enables data filtering between the EOP and the subsequent SOP markers, improving data handling efficiency.

Career Highlights

Hui Su is currently employed at Integrated Device Technology, Inc., where she continues to develop innovative solutions in memory technology. Her expertise and contributions have positioned her as a valuable asset in her field.

Collaborations

Hui has collaborated with notable colleagues, including Mario F Au and Jason Z Mo. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Hui Su's contributions to memory systems through her patent demonstrate her innovative spirit and technical expertise. Her work continues to influence advancements in the field, showcasing the importance of creativity in technology.

Profile summary based on public USPTO records.
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