Company Filing History:
Years Active: 2017
Title: Hu Chen - Innovator in Error Resilient Pipeline Technology
Introduction
Hu Chen is a notable inventor based in Logan, UT (US). He has made significant contributions to the field of processor instruction pipelines, particularly through his innovative patent related to error resilience.
Latest Patents
Hu Chen holds a patent for an "Error Resilient Pipeline." This invention introduces a Dynamically Adaptable Resilient Pipeline (DARP) controller that determines both a minimum and maximum error pipeline stage of a processor instruction pipeline. The DARP controller is designed to increase the clock frequency of the instruction pipeline when the minimum number of errors is zero and the maximum number of errors does not exceed a specified threshold. Conversely, it decreases the clock frequency if the minimum number of errors exceeds a defined error constant. This innovation enhances the reliability and efficiency of processing systems.
Career Highlights
Hu Chen is affiliated with Utah State University, where he continues to engage in research and development in the field of computer engineering. His work focuses on improving the performance and reliability of computing systems through innovative solutions.
Collaborations
Hu has collaborated with esteemed colleagues such as Koushik Chakraborty and Sanghamitra Roy, contributing to advancements in technology and research.
Conclusion
Hu Chen's work in developing an error resilient pipeline showcases his commitment to innovation in the field of computer engineering. His contributions are paving the way for more reliable and efficient processing systems.