Hsu-Tien Tung

Title: Hsu-Tien Tung: Innovator in Cache Memory Technology

Introduction

Hsu-Tien Tung is a notable inventor based in San Jose, California. He has made significant contributions to the field of cache memory technology, holding a total of five patents. His work focuses on improving the efficiency and performance of data transfer processes in computing systems.

Latest Patents

One of Hsu-Tien Tung's latest patents is titled "Predictive snooping of cache memory for master-initiated accesses." This invention addresses the challenges faced by PCI-bus controllers when transferring data from secondary memory. The controller performs an initial inquire cycle and withholds TRDY until any write-back cycle completes. This allows for a more efficient burst access between secondary memory and the PCI-bus master, minimizing delays during data transfers.

Another significant patent is the "System for using a dirty bit with a cache memory." This system eliminates the need to set a dirty bit in certain circumstances, which can save time during bus cycles. By not setting the dirty bit when writing to the same line of data in cache memory, the cache controller enhances the overall efficiency of data management.

Career Highlights

Hsu-Tien Tung is currently employed at Opti, Inc., where he continues to innovate in the field of cache memory technology. His work has had a profound impact on the performance of computing systems, making data transfers faster and more efficient.

Collaborations

Hsu-Tien Tung collaborates with Subir K Ghosh, a fellow innovator in the field. Their combined expertise contributes to the advancement of technology in their respective areas.

Conclusion

Hsu-Tien Tung is a prominent inventor whose work in cache memory technology has led to significant advancements in data transfer efficiency. His patents reflect a deep understanding of the challenges in computing systems and offer innovative solutions to enhance performance.