Hsinchu City, Taiwan

Hsiao-Chiu Hsu

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hsiao-Chiu Hsu. Retrieved from https://idiyas.com/inventor/hsiao-chiu-hsu-mu8at19i

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Hsiao-Chiu Hsu: Innovator in Semiconductor Technology

Introduction

Hsiao-Chiu Hsu is a notable inventor based in Hsinchu City, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in reducing parasitic capacitance in semiconductor devices. His innovative work has implications for the efficiency and performance of electronic components.

Latest Patents

Hsiao-Chiu Hsu holds a patent for a semiconductor structure designed to minimize parasitic capacitance. This patent describes a semiconductor structure that includes semiconductor layers disposed over a substrate, oriented lengthwise in a first direction. A metal gate stack is positioned over the semiconductor layers, oriented in a second direction that is perpendicular to the first. The design features a top portion and a bottom portion of the metal gate stack that interleave with the semiconductor layers. Additionally, source/drain features are located in the semiconductor layers adjacent to the metal gate stack. An isolation structure protrudes from the substrate, oriented along the second direction and spaced from the metal gate stack along the first direction. This isolation structure comprises a dielectric layer and an air gap, enhancing the overall performance of the semiconductor device.

Career Highlights

Hsiao-Chiu Hsu is currently employed at Taiwan Semiconductor Manufacturing Co., Ltd., a leading company in the semiconductor industry. His work at this prestigious organization has allowed him to collaborate with other talented professionals in the field.

Collaborations

Hsiao-Chiu Hsu has worked alongside notable colleagues such as Chia-Ta Yu and Feng-Cheng Yang. Their collaborative efforts contribute to advancements in semiconductor technology and innovation.

Conclusion

Hsiao-Chiu Hsu's contributions to semiconductor technology, particularly through his patent on reducing parasitic capacitance, highlight his role as an innovator in the field. His work continues to influence the development of more efficient electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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