Hsiang-Ming Yen

Title: Hsiang-Ming Yen: Innovator in Time-to-Digital Conversion Technology

Introduction

Hsiang-Ming Yen is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of time-to-digital conversion technology. His innovative approach has led to the development of a unique patent that enhances the accuracy and efficiency of time measurement systems.

Latest Patents

Hsiang-Ming Yen holds a patent for a "Time-to-digital converter using time residue feedback and related method." This invention provides a method and apparatus for measuring the elapsed time from a starting signal to an ending signal in a time-to-digital converter. The invention primarily calculates the number of complete cycles from the starting signal to the starting edge of the next clock cycle or the next Nth clock cycle, where N is a natural number greater than one. The calculated amount is then multiplied by the cycle time of the coarse clock to obtain a coarse time value. A time residue is calculated from the ending signal to the starting edge, and finally, the time residue is subtracted from the coarse time value to obtain the required time. This innovative method significantly improves the precision of time measurements.

Career Highlights

Hsiang-Ming Yen is currently employed at the National Applied Research Laboratories, where he continues to work on advancing technology in his field. His expertise and dedication have made him a valuable asset to the organization.

Collaborations

Hsiang-Ming Yen has collaborated with notable colleagues, including Chi-Hsu Chen and Jung-Chin Lai. Their combined efforts contribute to the ongoing research and development in time measurement technologies.

Conclusion

Hsiang-Ming Yen's contributions to time-to-digital conversion technology exemplify the impact of innovative thinking in engineering. His patent and work at the National Applied Research Laboratories highlight his commitment to advancing measurement accuracy.