This inventor holds 1 USPTO granted patent. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2004.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2004
Title: Hoo-Seung Cho and Semiconductor Device Innovation.
Introduction
Hoo-Seung Cho is an inventor associated with Seoul, South Korea, and Samsung Electronics Co., Ltd. His patent work includes a semiconductor device design intended to manage the relationship between a silicide layer and a well region.
Latest Patents
Cho is credited with 1 patent: “Semiconductor Device and Method of Fabricating a Semiconductor Device.” The invention describes a substrate with a well region and two impurity regions that define a channel. A gate electrode sits above the channel, while a silicide layer is formed within one impurity region. The design specifies relative depths for these features, including a shallow silicide layer, to address leakage current that could electrically bias the well region.
Career Highlights
Cho’s listed patent connects his inventive work with semiconductor device fabrication at Samsung Electronics Co., Ltd. The patent focuses on the structure and depth relationships of device regions, which are central considerations in semiconductor design.
Collaborations
Gyu-Chul Kim and Yong In Park are identified as Cho’s coworkers. The available information does not specify their roles in the patent or whether they collaborated on this invention.
Conclusion
Hoo-Seung Cho’s recorded patent reflects a focused contribution to semiconductor device design, addressing how impurity regions, a channel, and a silicide layer are arranged within a device.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile