Kawasaki, Japan

Hirotaka Maekawa

This inventor holds 2 USPTO granted patents. Top assignee: Fujitsu Semiconductor Limited. Active years: 2012-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hirotaka Maekawa. Retrieved from https://idiyas.com/inventor/hirotaka-maekawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2012-2013

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2 patents (USPTO):Explore Patents

Title: Hirotaka Maekawa: Innovator in Semiconductor Technology

Introduction

Hirotaka Maekawa is a prominent inventor based in Kawasaki, Japan. He has made significant contributions to the field of semiconductor technology, holding two patents that showcase his innovative approach to device manufacturing.

Latest Patents

Maekawa's latest patents focus on semiconductor devices and their manufacturing methods. One of his notable inventions involves the formation of recesses in a pMOS region, where a SiGe layer is created to cover both the bottom and side surfaces of each recess. Following this, a SiGe layer with a lower Ge content is formed on top of the initial SiGe layers. This innovative method enhances the performance and efficiency of semiconductor devices.

Career Highlights

Hirotaka Maekawa is currently employed at Fujitsu Semiconductor Limited, where he continues to push the boundaries of semiconductor technology. His work has been instrumental in advancing the capabilities of modern electronic devices.

Collaborations

Maekawa collaborates with talented colleagues, including Naoyoshi Tamura and Yosuke Shimamune, who contribute to the innovative environment at Fujitsu Semiconductor Limited.

Conclusion

Hirotaka Maekawa's contributions to semiconductor technology through his patents and work at Fujitsu Semiconductor Limited highlight his role as a key innovator in the field. His advancements continue to shape the future of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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