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For the Inventor, By the Inventor

Yokohama, Japan

Hiroshi Shinya

This inventor holds 5 USPTO granted patents. Top assignee: Kabushiki Kaisha Toshiba. Active years: 1989-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroshi Shinya. Retrieved from https://idiyas.com/inventor/hiroshi-shinya-l47eduzi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5

% Patents Active = 20.0

Average Co-Inventor Count = 2.1

ph-index = 4

Forward Citations = 58(Granted Patents)


Company Filing History:

goldMedal5 out of 53,276 
 
Kabushiki Kaisha Toshiba
 patents

Years Active: 1989-2008

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5 patents (USPTO):Explore Patents
1. 7385849 - Semiconductor integrated circuit device (2008-06-10),
2. 7266759 - Semiconductor integrated circuit device and error checking and correcting method thereof (2007-09-04),
3. 6957378 - Semiconductor memory device (2005-10-18),
4. 6570801 - Semiconductor memory having refresh function (2003-05-27),
5. 4849653 - Semiconductor circuit device for preventing an output of a bistable (1989-07-18),
Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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