Suwon, South Korea

Hiroshi Sasaki

This inventor holds 1 USPTO granted patent. Top assignee: Samsung Electronics Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroshi Sasaki. Retrieved from https://idiyas.com/inventor/hiroshi-sasaki-k452t3am

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Hiroshi Sasaki and Cryogenic Semiconductor Etching

Introduction

Hiroshi Sasaki is an inventor based in Suwon, South Korea, and works at Samsung Electronics Ltd. His patent work concerns cryogenic etching processes and semiconductor-device fabrication.

Latest Patents

Sasaki is associated with 1 patent, titled “Process Gas for Cryogenic Etching, Plasma Etching Apparatus, and Method of Fabricating Semiconductor Device Using the Same.” The invention describes forming a mold layer and hardmask on a substrate, then using cryogenic plasma etching to etch an exposed portion of the mold layer. Its process gas includes a first gas that generates etching radicals and a second gas containing an R—OH compound. The second gas is intended to reduce the production rate of ammonium salt during etching.

Career Highlights

The patent reflects Sasaki’s work in semiconductor manufacturing technology, particularly plasma etching and process-gas design. These techniques address material removal and process control during the fabrication of semiconductor devices.

Collaborations

Sasaki’s listed coworkers include Dongkyu Lee and Songyun Kang. The patent identifies a technical contribution in semiconductor etching, though the information provided does not specify the coworkers’ individual roles.

Conclusion

Hiroshi Sasaki’s patent focuses on improving cryogenic etching through process-gas design, contributing to the broader development of semiconductor fabrication methods.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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