Fukushima, Japan

Hiroshi Kawano

This inventor holds 2 USPTO granted patents. Top assignee: Shin-Etsu Handotai Co., Ltd.. Active years: 1994.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroshi Kawano. Retrieved from https://idiyas.com/inventor/hiroshi-kawano-ppppf3vn

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 32(Granted Patents)


Company Filing History:


Years Active: 1994

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2 patents (USPTO):Explore Patents

Title: Innovations by Hiroshi Kawano: Pioneering Semiconductor Wafer Polishing Techniques

Introduction

Hiroshi Kawano, an innovative inventor based in Fukushima, Japan, has made significant contributions to the semiconductor industry through his patented inventions. With a total of two patents to his name, Kawano's work focuses on the advanced processes for polishing semiconductor wafers, enhancing their quality and efficiency.

Latest Patents

Kawano's latest patents include:

1. **Apparatus for polishing chamfers of a wafer**: This innovative apparatus is designed to polish the edge chamfers of semiconductor wafers to achieve a mirror gloss finish. It features a rotatory cylindrical buff with annular grooves on its side and a wafer vacuum holder that securely holds and rotates the wafer. The design allows the cylindrical buff to shift axially, and the annular groove's width is significantly greater than the wafer's thickness, ensuring effective polishing. Additionally, a drive mechanism is included for axially biasing the cylindrical buff.

2. **Method and an apparatus for polishing wafer chamfers**: This invention outlines a method that comprises several steps for polishing the peripheral chamfers of a semiconductor wafer. It involves the use of a cylindrical cup-like rotatory buff with an internal polish groove closely matching the chamfered wafer edge's profile. The steps include turning the buff, disposing of the wafer inside it, rotating the wafer at a low speed, and applying pressure to press the wafer edge into the internal polish groove. An apparatus designed for this method incorporates the cylindrical cup-like rotatory buff.

Career Highlights

Hiroshi Kawano is currently employed at Shin-Etsu Handotai Co., Ltd., where he applies his expertise in semiconductor technology to drive innovation and improve production processes. His role emphasizes the importance of precision and quality in wafer manufacturing, showcasing his dedication to advancing the field.

Collaborations

Throughout his career, Kawano has worked alongside esteemed colleagues such as Fumihiko Hasegawa and Tatsuo Ohtani. Together, they contribute valuable insights and perspectives that enhance the innovation process at Shin-Etsu Handotai Co., Ltd.

Conclusion

Hiroshi Kawano's advancements in wafer polishing technology reflect his commitment to innovation in the semiconductor industry. With his groundbreaking patents and collaborative spirit, Kawano continues to play a crucial role in enhancing the quality and efficiency of semiconductor manufacturing processes, paving the way for future developments in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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