This inventor holds 2 USPTO granted patents. Top assignee: Hitachi, Ltd.. Active years: 1992-1993.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1992-1993
Title: Hiroshi Date: Innovator in Circuit Element Placement Optimization
Introduction
Hiroshi Date is a prominent inventor based in Hitachi, Japan. He has made significant contributions to the field of circuit design and optimization. With a focus on enhancing the efficiency of circuit element placement, Date has been awarded 2 patents for his innovative methods and apparatus.
Latest Patents
Hiroshi Date's latest patents include a "Placement optimizing method/apparatus" and an "Apparatus for designing." The first patent discloses a method for finding the optimal placement of circuit elements. This method utilizes a processor network, where multiple processors are interconnected to form a neural network. Each processor processes its own output along with the outputs of others to solve complex placement problems. The second patent focuses on optimizing element placement for large-scale integrated circuits (LSIs). It describes a parallel processing computer system that employs multiple CPUs to determine the best arrangement of circuit elements through a series of exchanges based on cost improvement values.
Career Highlights
Hiroshi Date is currently employed at Hitachi, Ltd., where he continues to develop innovative solutions in circuit design. His work has significantly impacted the efficiency and performance of electronic devices.
Collaborations
One of his notable collaborators is Terumine Hayashi, with whom he has worked on various projects related to circuit optimization.
Conclusion
Hiroshi Date's contributions to circuit element placement optimization demonstrate his expertise and commitment to advancing technology in the field. His innovative patents reflect a deep understanding of complex systems and a drive to improve electronic design processes.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
