Kasugai, Japan

Hiromichi Mizuno

This inventor holds 5 USPTO granted patents. Top assignees: Fujitsu Corporation, Fujitsu Microelectronics Limited. Active years: 2007-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiromichi Mizuno. Retrieved from https://idiyas.com/inventor/hiromichi-mizuno-9a80ritl

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 3.2

ph-index = 2

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 2007-2009

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5 patents (USPTO):Explore Patents

Title: Hiromichi Mizuno: Semiconductor and Data-Buffering Inventions.

Introduction

Hiromichi Mizuno is an inventor associated with Kasugai, Japan. His work includes semiconductor devices and data-buffering technologies, and he is credited with 5 patents.

Latest Patents

Mizuno’s listed patents include “Semiconductor Device Including Voltage Level Conversion Output Circuit.” The invention describes an I/O circuit with cells that operate using different high-potential power supplies. A control circuit selects which cell to activate according to a voltage selection signal, allowing the circuit to generate an output signal at a voltage suited to the selected cell’s operating voltage.

Another listed invention is “Data Buffer Circuit, Interface Circuit and Control Method Therefor.” It concerns buffering data between synchronous and asynchronous circuits and controlling transfers between a synchronous memory circuit and an asynchronous circuit. One described implementation places a one-port RAM between an image-processing system and a main system. Its control components select the current-cycle address for write access and a subsequent-cycle address for read access.

Career Highlights

Mizuno’s career is associated with Fujitsu Corporation and Fujitsu Microelectronics Limited. The patent descriptions reflect work on adaptable I/O voltage operation and data transfer between systems with different timing characteristics.

Collaborations

His listed coworkers include Toshiyuki Nishii and Kazuya Taniguchi.

Conclusion

Hiromichi Mizuno’s patent portfolio highlights contributions to semiconductor I/O circuits and data-buffering interfaces, alongside his professional associations with Fujitsu organizations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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