Hiroaki Ueno

Title: Hiroaki Ueno: Innovator in Semiconductor Device Simulation

Introduction

Hiroaki Ueno is a prominent inventor based in Higashihiroshima, Japan. He has made significant contributions to the field of semiconductor technology, particularly in the area of simulation methods for semiconductor devices. His innovative work has led to the development of a unique patent that addresses critical challenges in thermal drain noise analysis.

Latest Patents

Hiroaki Ueno holds a patent for a "Simulation model for design of semiconductor device, thermal drain noise analysis method, simulation method, and simulation apparatus." This patent outlines a semiconductor device simulation method that includes several key steps. It involves storing surface potential and threshold voltage data in a storage unit, computing thermal drain noise based on this data, and determining whether to reduce thermal drain noise. The method reflects the computation results in the simulation model, enhancing the accuracy of thermal drain noise analysis.

Career Highlights

Ueno is affiliated with the Semiconductor Technology Academic Research Center, where he applies his expertise in semiconductor device simulation. His work has been instrumental in advancing the understanding of thermal drain noise in MOSFETs, contributing to improved device performance.

Collaborations

Hiroaki Ueno collaborates with notable colleagues, including Mitiko Miura and Satoshi Hosokawa. Their combined efforts in research and development have fostered innovation in semiconductor technology.

Conclusion

Hiroaki Ueno's contributions to semiconductor device simulation and thermal drain noise analysis exemplify the impact of innovative thinking in technology. His patent and collaborative efforts continue to influence the field, paving the way for future advancements.