Ota, Japan

Hideyuki Iwamura

This inventor holds 1 USPTO granted patent and 1 EPO patent. Top assignee: Semiconductor Components Industries, LLC. Active years: 2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hideyuki Iwamura. Retrieved from https://idiyas.com/inventor/hideyuki-iwamura-n4jm8t76

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0


Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2014

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1 patent (USPTO):Explore Patents

Title: Innovations by Hideyuki Iwamura

Introduction

Hideyuki Iwamura is a notable inventor based in Ota, Japan. He has made significant contributions to the field of semiconductor technology. His innovative approach addresses critical challenges in semiconductor device design.

Latest Patents

Iwamura holds a patent for a semiconductor device with chips on isolated mount regions. This invention tackles the issue of short circuits between chips and enhances the accuracy of temperature detection with controlling semiconductor chips. The design features a first mount region for a driving semiconductor chip and a second mount region for a controlling semiconductor chip, both formed in isolation. A projecting area in the first mount region extends into the second mount region, allowing for improved attachment of the controlling semiconductor chip. This structure effectively prevents short circuits and improves temperature detection accuracy.

Career Highlights

Iwamura is currently associated with Semiconductor Components Industries, LLC, where he continues to innovate in semiconductor technology. His work has been instrumental in advancing the reliability and efficiency of semiconductor devices.

Collaborations

Iwamura has collaborated with Isao Ochiai, contributing to the development of cutting-edge semiconductor solutions.

Conclusion

Hideyuki Iwamura's contributions to semiconductor technology exemplify the importance of innovation in addressing complex engineering challenges. His patent reflects a significant advancement in the field, showcasing his expertise and commitment to improving semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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