This inventor holds 1 USPTO granted patent. Top assignee: California Institute of Technology. Active years: 2007.
Company Filing History:
Years Active: 2007
Title: Helia Naeimi: Innovator in Nanoscale Memory Technology
Introduction
Helia Naeimi is a prominent inventor based in Pasadena, CA (US). She has made significant contributions to the field of nanoscale memory technology. Her innovative approach addresses the challenges associated with constructing and managing nanoscale devices.
Latest Patents
Helia Naeimi holds a patent for her invention titled "Deterministic addressing of nanoscale devices assembled at sublithographic pitches." This patent describes a method for constructing and addressing a nanoscale memory with known addresses while tolerating defects that may arise during the manufacturing process or the device's operational lifetime. The method involves the stochastic assembly of nanoscale wires with addresses. During the programming phase, these wires are selected using their stochastic addresses through microscale inputs, allowing for a desired address code to be associated with the selected nanoscale wires. Memory addresses are then linked to these codes, facilitating read/write operations from and to the memory.
Career Highlights
Helia Naeimi is affiliated with the California Institute of Technology, where she continues to advance her research in nanoscale technologies. Her work has garnered attention for its innovative solutions to complex problems in memory construction and addressing.
Collaborations
Helia collaborates with André M DeHon, a fellow researcher who shares her passion for advancing technology in the field of nanoscale devices.
Conclusion
Helia Naeimi's contributions to nanoscale memory technology exemplify her innovative spirit and dedication to solving complex engineering challenges. Her work not only enhances our understanding of nanoscale devices but also paves the way for future advancements in the field.