Hee-Jin Byun

This inventor holds 11 USPTO granted patents and 2 published patent applications. Top assignees: Hynix Semiconductor Inc., Skhynix Inc.. Active years: 2010-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hee-Jin Byun. Retrieved from https://idiyas.com/inventor/hee-jin-byun-7i5wk6z3

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 11 (Patent Applications = 2)

% Patents Active = 90.9

Average Co-Inventor Count = 1.3

ph-index = 2

Forward Citations = 9(Granted Patents)

Location History:

Kyoungki-Do, KR (2010 - 2013)
Ichon, KR (2010 - 2013)
Gyeonggi-do, KR (2012 - 2020)

Company Filing History:

7 out of 6,228

Hynix Semiconductor Inc.

Years Active: 2010-2020

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11 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10763181 - Semiconductor device and repair operation method thereof (2020-09-01),

2. 9875777 - Semiconductor memory device and method for operating the same (2018-01-23),

3. 8947955 - Semiconductor memory, memory system, and operation method thereof (2015-02-03),

4. 8547764 - Semiconductor memory device and method for performing data compression test of the same (2013-10-01),

5. 8509005 - Data strobe signal generating device and a semiconductor memory apparatus using the same (2013-08-13),

6. 8406080 - Data output control circuit of a double data rate (DDR) synchronous semiconductor memory device responsive to a delay locked loop (DLL) clock and method thereof (2013-03-26),

7. 8164963 - Semiconductor memory device (2012-04-24),

8. 8031553 - Data strobe signal generating device and a semiconductor memory apparatus using the same (2011-10-04),

9. 7852707 - Data output control circuit of a double data rate (DDR) synchronous semiconductor memory device responsive to a delay locked loop (DLL) clock (2010-12-14),

10. 7843744 - Semiconductor memory device and operation method thereof (2010-11-30),

11. 7738315 - Circuit for generating output enable signal in semiconductor memory apparatus (2010-06-15),

Title: Hee-Jin Byun: Innovator in Semiconductor Technology

Introduction

Hee-Jin Byun is a prominent inventor based in Gyeonggi-do, South Korea. She has made significant contributions to the field of semiconductor technology, holding a total of 11 patents. Her work focuses on enhancing the efficiency and functionality of semiconductor devices.

Latest Patents

Among her latest patents is a groundbreaking invention titled "Semiconductor device and repair operation method thereof." This patent describes a semiconductor device that includes a plurality of first and second signal lines arranged alternately. The device features a first signal transmitter that transmits signals through the main signal lines and can shift the signal transmission path based on repair information. Another notable patent is for a "Semiconductor memory device and method for operating the same." This invention includes an enable signal generation portion that activates a data output enable signal based on a read command, ensuring efficient data output synchronization.

Career Highlights

Hee-Jin Byun has worked with leading companies in the semiconductor industry, including Hynix Semiconductor Inc. and SK Hynix Inc. Her experience in these organizations has allowed her to develop innovative solutions that address complex challenges in semiconductor technology.

Collaborations

Throughout her career, Hee-Jin has collaborated with talented individuals such as Dae-Ho Yun and Ho-Uk Song. These partnerships have contributed to her success and the advancement of her inventions.

Conclusion

Hee-Jin Byun is a remarkable inventor whose work in semiconductor technology has led to numerous patents and innovations. Her contributions continue to shape the future of the industry, making her a key figure in the field.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: