Karnataka, India

Harivinay Kancharla

This inventor holds 1 USPTO granted patent. Top assignee: Sima Technologies, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Harivinay Kancharla. Retrieved from https://idiyas.com/inventor/harivinay-kancharla

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Harivinay Kancharla and Reconvergent Clock-Mesh Design

Introduction

Harivinay Kancharla is an inventor associated with Karnataka, India, and Sima Technologies, Inc. His listed patent concerns clock distribution for on-chip compute clusters.

Latest Patents

Kancharla is credited with 1 patent: “Reconvergent Clock Mesh for On-Chip Compute Cluster.” The invention describes a compute cluster made up of interconnected compute elements and a clock mesh that distributes a clock signal to them. Its nodes are connected by branches, with repeaters placed between nodes. These repeaters enable forward clock-signal propagation while preventing backward propagation, making the mesh unidirectional. The design also allows the signal to travel along separate paths that later reconverge.

Career Highlights

The available information identifies Kancharla’s work at Sima Technologies, Inc., and his contribution to clock-distribution architecture for compute clusters. The patent’s approach combines controlled signal direction with reconvergent paths in a mesh topology.

Collaborations

Kancharla’s listed coworker is Sounil Biswas. The provided information does not specify their roles or the nature of their collaboration.

Conclusion

Harivinay Kancharla’s listed patent presents a unidirectional, reconvergent clock mesh designed to distribute clock signals across interconnected compute elements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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