Kalyan, India

Hardik P Bhagat

This inventor holds 1 USPTO granted patent. Top assignee: Globalfoundries Inc.. Active years: 2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hardik P Bhagat. Retrieved from https://idiyas.com/inventor/hardik-p-bhagat

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2019

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1 patent (USPTO):Explore Patents

Title: The Innovative Mind of Hardik P Bhagat

Introduction

Hardik P Bhagat, an inventive talent based in Kalyan Nagara Post, IN, has made notable contributions to the field of technology. As an engineer at GlobalFoundries Inc., he has focused on enhancing testing methodologies, exemplifying the spirit of innovation.

Latest Patents

Hardik holds a patent for an innovative method titled "Auto test grouping/clock sequencing for at-speed test". This method incorporates the definition of a plurality of clock architecture attributes for various clock domains, assigns these domains to a testing group, and refines the grouping based on the architecture attributes until an optimal configuration is achieved. His work in this area showcases his commitment to advancing testing efficiency in digital systems.

Career Highlights

In his position at GlobalFoundries Inc., Hardik has demonstrated his expertise and ability to solve complex challenges in semiconductor testing. His contributions are essential in ensuring that devices meet performance standards and function as intended in real-world conditions.

Collaborations

Hardik has had the opportunity to collaborate with talented individuals, including his coworkers Mark R Taylor and Baalaji Konda Ramamoorthy. These collaborations foster an environment of creativity and collective problem-solving that enhances overall innovation at GlobalFoundries Inc.

Conclusion

Hardik P Bhagat stands as a notable inventor within the technology sector, with a strong focus on improving testing processes. His patent and collaborative efforts illustrate his drive to push the boundaries of innovation in the semiconductor industry, positioning him as a vital contributor to future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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